1. Field of the Invention
This invention relates to an improvement in apparatus for limiting the current drawn by a faulted load that is connected to an AC power bus, and more particularly to methods of reducing the voltage transients imposed on an electric power generator source or AC bus by a faulted load.
2. Description of the Prior Art
Power converters such as Engine Generator Sets, Motor Generator Sets, Solid State Power Converters and the like, usually have limited capacity to supply current into a load fault. On the occurrence of a fault or short circuit in the load, the output voltage will dip severely, until fault clearing circuit breakers or fuses open the faulted load line. If a number of devices are being powered from the same source, all of the devices are subjected to the extreme voltage dip or transient. Computer equipment is commonly supplied with 400 Hz power from a Solid State Power Converter or a Motor Generator Set. When parallel redundant computer devices are supplied from a common bus, a large voltage transient on the bus caused by a faulted device, can disrupt operation of the entire system, and can not be tolerated. Examples are the computers that support airline reservation systems, or support tellers in banks. When such a system suffers a power interruption for only a short time, it may be hours before the entire system can be returned to full function.
For this reason, it has been the practice to provide current limiting circuits in series with individual branch loads. In this manner, fault current can be limited to a value such that the voltage transients which are caused by a fault in a given branch load, are limited to a value that does not disrupt function of loads other than the one in which the fault occurred.
Over the past twenty years, several types of current limit devices have been developed and used. These devices operate normally in a low impedance mode, and change to a high impedance mode when a fault current is sensed. In the devices, the value of the total impedance in the high impedance mode must be set to limit the fault current. When operating in the low impedance mode, the normal AC current flows in a circuit that may include an inductor in series with a capacitor tuned to the load operating frequency, or it may instead include a series switch. Both circuits present a negligible impedance to the flow of current. When operating in the high impedance mode, the fault current flows in a bypass circuit which may include a series reactor and resistor, or a saturable reactor. The bypass circuit components must be selected and set to limit the fault current.
Examples of prior art current limiting devices are U.S. Pat. No. 3,558,983, by Steen and U.S. Pat. No. 4,158,864 by Kennon. In the Steen embodiment, the low impedance circuit comprises, in each phase, two thyristors in inverse parallel relationship (back-to-back) each in series with a commutation inductor. The high impedance circuit comprises two thyristors in inverse parallel relationship, in series with a resistor. The resistor is set to limit current to a given value. When an overcurrent condition is detected, the thyristors in the low impedance circuit are commutated off and the thyristors in the high impedance circuit are gated on. Fault current then flows in the high impedance circuit. The fault current rate of rise di/dt is not restricted and depends on the value of the inserted resistor. If the faulted load circuit breaker does not trip after a predetermined time or the load fault is not removed, a signal is sent by controls to trip a circuit breaker, disconnecting the faulted load.
In the Kennon embodiment, a pair of series connected resonant branch circuits are utilized. Normal AC current flows in a circuit including an inductor in series with a capacitor and tuned to the load operating frequency. Upon detection of a fault, a switch is opened, the normal current circuit is detuned and current flows through a parallel high impedance path. As in Steen, the fault current rate of rise di/dt is not restricted in any way, since the high impedance is inserted abruptly and the impedance value is selected to permit the highest specified "let-through" current. Furthermore, in both Steen and Kennon, neither is any provision made to soften or counter the voltage rise that will occur when the load circuit breaker trips open and the short circuit current vanishes.
In general, both the Steen and Kennon devices appear well suited as protective devices for limiting a temporary overload condition of 125 or 135 percent of rated current. Their application to short-circuit conditions is another matter. Short-circuit conditions may be as high as 200 or 300 percent of rated current. The current limiting device would then be required to permit up to 200 or 300 percent of rated current to flow for a predetermined time, typically 1 second. For example, the military specification SHIPS-D-5977 requires current limiting devices to limit at 240 percent of rated current for 750 milliseconds. Thus for the Steen and Kennon devices, switching to the high impedance mode could result in an initial current as high as 240 percent of rated, producing steep transient voltage dips in the AC power bus voltage. This would make them unsuitable for the application. Thus, there exists a need for a device that will not only limit the let-through current, but will produce a soft start and a soft load-off condition for the current limiting device high impedance operation, so that resulting AC bus voltage transients are negligible.